abc - use ABC for technology mapping

    abc [options] [selection]

This pass uses the ABC tool [1] for technology mapping of yosys's internal gate
library to a target architecture.

    -exe <command>
        use the specified command instead of "<yosys-bindir>/yosys-abc" to execute ABC.
        This can e.g. be used to call a specific version of ABC or a wrapper.

    -script <file>
        use the specified ABC script file instead of the default script.

        if <file> starts with a plus sign (+), then the rest of the filename
        string is interpreted as the command string to be passed to ABC. The
        leading plus sign is removed and all commas (,) in the string are
        replaced with blanks before the string is passed to ABC.

        if no -script parameter is given, the following scripts are used:

        for -liberty without -constr:
          strash; dc2; scorr; ifraig; retime -o {D}; strash; dch -f;
               map {D}

        for -liberty with -constr:
          strash; dc2; scorr; ifraig; retime -o {D}; strash; dch -f;
               map {D}; buffer; upsize {D}; dnsize {D}; stime -p

        for -lut/-luts (only one LUT size):
          strash; dc2; scorr; ifraig; retime -o; strash; dch -f; if; mfs;

        for -lut/-luts (different LUT sizes):
          strash; dc2; scorr; ifraig; retime -o; strash; dch -f; if; mfs

        for -sop:
          strash; dc2; scorr; ifraig; retime -o; strash; dch -f;
               cover {I} {P}

          strash; dc2; scorr; ifraig; retime -o; strash; dch -f; map

        use different default scripts that are slightly faster (at the cost
        of output quality):

        for -liberty without -constr:
          retime -o {D}; map {D}

        for -liberty with -constr:
          retime -o {D}; map {D}; buffer; upsize {D}; dnsize {D}; stime -p

        for -lut/-luts:
          retime -o; if

        for -sop:
          retime -o; cover -I {I} -P {P}

          retime -o; map

    -liberty <file>
        generate netlists for the specified cell library (using the liberty
        file format).

    -constr <file>
        pass this file with timing constraints to ABC. use with -liberty.

        a constr file contains two lines:
            set_driving_cell <cell_name>
            set_load <floating_point_number>

        the set_driving_cell statement defines which cell type is assumed to
        drive the primary inputs and the set_load statement sets the load in
        femtofarads for each primary output.

    -D <picoseconds>
        set delay target. the string {D} in the default scripts above is
        replaced by this option when used, and an empty string otherwise.

    -I <num>
        maximum number of SOP inputs.
        (replaces {I} in the default scripts above)

    -P <num>
        maximum number of SOP products.
        (replaces {P} in the default scripts above)

    -lut <width>
        generate netlist using luts of (max) the specified width.

    -lut <w1>:<w2>
        generate netlist using luts of (max) the specified width <w2>. All
        luts with width <= <w1> have constant cost. for luts larger than <w1>
        the area cost doubles with each additional input bit. the delay cost
        is still constant for all lut widths.

    -luts <cost1>,<cost2>,<cost3>,<sizeN>:<cost4-N>,..
        generate netlist using luts. Use the specified costs for luts with 1,
        2, 3, .. inputs.

        map to sum-of-product cells and inverters

    -g type1,type2,...
        Map the the specified list of gate types. Supported gates types are:
        (The NOT gate is always added to this list automatically.)

        also pass $_DFF_?_ and $_DFFE_??_ cells through ABC. modules with many
        clock domains are automatically partitioned in clock domains and each
        domain is passed through ABC independently.

    -clk [!]<clock-signal-name>[,[!]<enable-signal-name>]
        use only the specified clock domain. this is like -dff, but only FF
        cells that belong to the specified clock domain are used.

        set the "keep" attribute on flip-flop output wires. (and thus preserve
        them, for example for equivalence checking.)

        when this option is used, the temporary files created by this pass
        are not removed. this is useful for debugging.

        print the temp dir name in log. usually this is suppressed so that the
        command output is identical across runs.

        set a 'abcgroup' attribute on all objects created by ABC. The value of
        this attribute is a unique integer for each ABC process started. This
        is useful for debugging the partitioning of clock domains.

When neither -liberty nor -lut is used, the Yosys standard cell library is
loaded into ABC before the ABC script is executed.

This pass does not operate on modules with unprocessed processes in it.
(I.e. the 'proc' pass should be used first to convert processes to netlists.)